I have 15+ years of PCB design experience. Mostly hobby stuff but a fair amount of processional work. Kilowatt range brushless motor controllers, basic RF stuff, lots of microcontroller stuff.

I had Fable design an LED earring. Rechargeable coin cell, RP2350 cpu, IMU, 45 addressable LEDs. It made two mistakes - missed the through holes on the coin cell holder footprint and made the center pad too small. I was able to have JLC swap the through hole battery holder for a surface mount one, and I put a little solder on the small center pad to make it stick up above the mask. They work great! It took 6 days of Fable usage, so about $50 on my Max plan. Very cheap for hardware dev.

I was sufficiently impressed that I’ve been going over old circuit board designs. Some half finished, some completed but in need of a next rev, and I’m getting so much done.

To see it hit the mainstream like the OpenAI announcement, I think big things are coming for this world and by and large they are not ready for it.

For my part, I have always loved PCB design and layout but I simply can’t keep up with the amount of labor required to build what I want, so I welcome this change.

I have also begun exploring more advanced algorithms for PCB manipulation. I have a fairly dense board that needs a few more small chips added. I have an algorithm now that can kinda shuffle and jostle things around so you take up all the spare microns of space across a region of the board and make openings to squeeze a little more in there. It’s pretty cool to see the visualizations as I have it generate movies of the component drift. I foresee much more powerful tools like this in the future.

One tip: have it make a project web page with a chronological list of big changes and detailed visualizations for everything that happens. I can actually prompt all of this on my phone while I am out and about, and view the results on a Tailscale served local page. I’ve always wanted to be able to do PCB design when away from home and now I can!

A personal data point: I had Claude Opus 4.8 design a fairly textbook circuit that outputs a monochrome image burned in an EEPROM over standard 640x480 VGA using only 74 series logic and GALs. It designed the circuit and GAL code, and I did the routing, and got it made through JLC for $6. After it came back, there was one error that was not caught, which I could blue-wire, and it works just fine otherwise. I was fairly impressed.

I worked on this product, which is available free for personal use: https://www.jitx.com/

I recommend the CLI, which I wrote specially to enable an easy LLM workflow: https://docs.jitx.com/en/latest/getting-started/cli/index.ht...

There's a companion Claude skill: https://github.com/JITx-Inc/jitx-skills

I would bet that using this, you could get pretty close to shippable PCB on first try. This is being used by some pretty big players to design complicated high frequency boards, and that's the main focus of the product, but it can handle basic designs just fine.

I got a flexpcb that validates in JLC and PCBWay DRC tools from the KiCAD MCP Server and Codex.

I have yet to order any or program it, but it was enough to make me push on with a PCB art project for ST-style guitar pickguards - no netlist, no problems.

I'm also foolishly toying with NeXTBus dev boards for the Cube. Is it cursed? Probably. https://github.com/itomato/NeXTBus-Dev-Board

For reasonably complex boards, it’s often not possible to know if it’ll work as intended until you have an assembled prototype in hand… even if you have the best SPICE and RF simulations ever, data sheets for many components can be missing important details, or components can have errata.

LLMs may be able to accelerate time to first prototype, but I don’t think it’ll be possible for them to revolutionise electronics design in the same way that’s happened for software - there’s not enough data, and it’s not cheap to gather more.

I think the new Astra computer use demos show that the models might be able to do things like inspection of real world objects if given a camera.

Super excited to see real world feedback added into the agent loops we have gotten used to working with. Could you let the model print and test the circuit boards it is prototyping with a jig?

Results for GPT-6 Astra and Gemini Flash 3.8 are just in! GPT-6 claimed the first spot with a score of 69.3. Gemini 3.8 Flash on a very solid 5th spot with 55.4.

I have a circuit board on my bench designed and ordered from china for 1h (manufacturing+ shipping took 14days), fable designed it I think or sol don't remember anymore but it was in claude code. I told it to benchmark different kicad autoroute tools and I picked the routes I liked the best, with a bit of changes. It feels like magic to be able to go from idea toa physical thing in such a short amount of time. The board works I made some mistakes the ai had made some mistakes but mostly stuff I could fix with some soldering, also one parts datasheet was wrong but I couldn't have known that without ai.

But I started like others, I would build manually, then run drc then sleep on it and check again and ask an llm to double check for me then order. Llms catch quite a few things but like with code like to make things more complicated than that have to be.

Interesting that on their current leaderboard (https://eebench.org/), GPT-5.6 Sol scores just above GPT-5.4 but below GPT-5.5, the only benchmark that shows that 5.6 is worse than 5.5 on something?

That the table contains what seems to be absolute numbers for score, cost/task, time/task and output tokens, makes it seem like they've only made one run for each task/model combo, but that can't be right, right? I don't see any mentions of how many times they run each task, so if it's just one run per task/model, isn't this more noisy than useful?

We tested pretty much all available "AI" board and schematic auto-layouters in the market. All failed even with the most basic tasks.

On the other side the latest frontier models are pretty strong in writing embedded C + Assembler code and debugging it afterwards. It's fun to watch it writing crazy complex 'gdb' plugins in Python. This improved brutally.

Just as some anecdatum, I've tried this a couple of times over the last few years. 2024-2025, no body could generate anything of any sort of complexity, however maybe around the Opus 4.7 timeline, I tried having it generate some relatively simple and one slightly more complex circuit around 8-bit PIC micros, and was very pleasantly surprised. The schematics for simpler stuff is usually OK, often with some of the kind of crazy belt-and-suspenders stuff you see in code (how many decoupling caps do I actually need here, Claude?), and PCB layout has basically been terrible every time I've tried it.

Recent models can generate mostly competent schematics if you're using well known parts, feed them data sheets (and you _must_ feed them the errata too) and it's not too complex. Any complexity analog or RF, everything falls down quickly if you know what you're looking at. Maybe Astra will do better? There's still so much implicit knowledge that a good designer (not me by a long shot, but I know a little) will bake into a board, and even as cheap as JCLPCB is now, you don't want to have to spin a half dozen revs because Claude or Codex hallucinated. It will be genuinely interesting to see what happens on this front.

I've been tinkering with a personal project over the past year.

I have no experience and I'm slowly failing forward with the help of YouTube, KiCad and patience.

I've had three rounds of PCB's from an online supplier, only to discover issues related to my own understanding of the components in each version.

In my latest iteration I've been leaning on some standard models (Gemini and Claude) and they have inspected my schematics and spotted some errors and instructed me on how to address them, as well as advised on how to make use of some components I wasn't aware I needed.

What I will say... they didn't design anything, I've done that myself, but they have been a good tool to bounce ideas off of.

Time will tell if I will get something usable this time around!

At the very least, you can (and probably should) put a plaintext netlist and BOM into an LLM to triple-check your work.

It will use the part datasheets and decent EE logic to cross reference pins and parts and polarities and generally check that SMD caps and resistors have realistic specifications for their footprint, switching regulators and communication ICs are configured correctly (e.g. when you have resistor settings for an ethernet PHY indicating 100Base-T and RMII, you also won't need TX/RX 2 and 3 and two clocks and a COL net, which it would check), all nets are named and linked correctly, buses have the correct and consistent termination, and so on.

It's game over once AI figures out autorouting.

Yes. Certainly not a "one-shot" type deal but I've been pretty impressed with LLMs for helping tweak layout and to do thermal/power simulations as well as BOM consolidation. They're excellent at "can I swap X and Y pins on the micro? If yes, update the docs/firmware/schematic and import the changes to the PCB" type things.

Routing is still a challenge but making _adjustments_ to a layout for better routing in a particular area is decent.

The last time I had a model take a datasheet and make a footprint and 3d model out of it, GPT 5.4 had just been released and the results were decent but did need tweaking.

Lets say I do vibetronics - Who can I then send the schematics to, to have troubleshooting completed? Is there a service that is like "okay we'll take your high voltage nightmare and double check that it won't make magic smoke"?

Would be good to see the full details of the tasks / methodology used. https://eebench.org/methodology.html makes this unclear.

> A real capacitor makes the task more interesting. A ceramic part may provide much less than its advertised capacitance once it has voltage across it. Parts have tolerances. Adding more capacitance costs more, takes up space and makes the rail slower to recharge when the power returns. A design that works with nominal values can fail with the parts that arrive.

It sounds like from a reasonable reading of the benchmark post that there's some things that are being tested that are assumed to be criteria that you expect the models to intuitively find those things to be important (i.e. the stuff about working on parts that have tolerances etc.). If that's so, then this really feels like mostly an exploration of whether an LLM has a good understanding of unstated constraints and has an appropriate in distribution set of priors that would be able to form models where it's reasonable to design on those lines.

It's hard to tell whether this is a problem though as the methodology is imprecise.

If you're spending time on evals against your own product, I'd be super curious to see how far you can get to by using a top tier model to produce generalized instructions for lower tier models. E.g. in a loop: "This eval missed X. what's the simplest single instruction that would have helped this session consider that as necessary that can benefit all future runs. Stick that in AGENTS.md and retest."

I found LLMs circa 4 months ago to be decent at textbook-style electronics, but they choke at anything nontrivial. They approach things like someone that knows the undergrad and grad textbooks, but has absolutely zero experience. No ability to answer questions such as "is this adequate", "do I need a LPF here", "how do I kill resonance without increasing impedance", etc.

I'm guessing that this is due to a lack of RL and data.

I was watching “GPT Plays Pokemon” for a few minutes yesterday. It can beat the game in 18 hours. Faster than most players. Using only vision.

It got me thinking. It could master all sorts of things like this but I wouldn’t care. I’m numb to it at this point.

But if could get an Inbachi-All clear in DoDonPachi SaiDaiOuJou, using only vision. Then I might start paying attention.

https://youtu.be/1Rm38aT9Jmo

Not exactly in the the same class as PCBs, but I've had a lot of success with Codex and Claude producing Fritzing diagrams. I've even got a skill set up with Claude so that it follows my preferences with breadboard wiring, using bezier curves to avoid wires crossing. Also, if it can't find a component in the library, it's quite happy drawing svgs of its own.

A really nice application could be making test jigs, to validate everything on the PCB is functioning properly. One could have it design a fully custom motherboard with pogo pins and the necessary software, etc. All should be low complexity and therefore doable by the AI without much supervision.

I have tried to use AI on this from GPT3, documenting a few of the attempts on my blog. They know the datasheets and the theory enough to be extremely useful at the start, but the most recent ones are becoming scary good. Routing a PCB is certainly a bit more than joining some wires, you have to accommodate power traces, ground loops, component overlap and all the various RF tricks and tips, but I do believe we are less than a year from prompt to full assembly including enclosure.

> When its 5 V supply disappears, the circuit has to keep the processor alive for another 20 ms so it can save the accumulated reading.

> Most models intuitively jump to the right base conclusion: add a capacitor.

This is written as if it's some astonishing expert knowledge and not something that would be obvious to any hobbyist who knew the names of basic components.

Didn't do the PCB with ChatGPT, but did the analog circuitry for a 3 stage ultra low noise amp project I have been working on this past week using 5.6sol and 3.8 flash.

The models are excellent at doing maths, and excellent at thinking of fine details, but the design that was ultimately landed on was pretty excessive with lots of total overkill, which was met with lots of the familiar "Yeah, you're totally right, we don't need to do that".

5.6 did make a really nice BOM though, which even included quick reference explainers for what each part did. Pretty fancy.

We'll see when Astra comes around if it catches all these strange/useless choices.

It is 3 years later and these AIs have not produced anything meaningful.

Not PCB layout, but I've been building CircuitLab Assistant (https://www.circuitlab.com/), a chat window 100% integrated with our schematic editor and simulation engine. Can build / modify a schematic, troubleshoot, answer questions, configure simulations, etc.

If anyone wants to try an early beta, reply with your CircuitLab username and I'll get you set up. We know have a lot more to do, but would love some feedback on this early version!

You need to have the AI validate it with a separate reviewer like with code.

I'm confused. Who made this benchmark and why? It is fascinating to me that people are putting this much work into trying to measure and evaluate LLMs when we've never gone to this level for humans. Sounds like they also built a harness/feedback loop so the LLM knows if it's doing a good job? Again, why didn't anyone ever do this for human engineers?

I'm excited by the option in Astra to route PCBs.

The next pain-point is sourcing the components from Digikey, LCSC, etc., and finding suitable substitutes if necessary.

Of course this assumes the LLMs can already read datasheets because that's the biggest pain-point in designing electronics. It's like filling out tax forms.

Finally it would be great if LLMs could extract simulation models from datasheets!

I have found that AI is great for sorting out your libraries, drawing and helping double check footprints managing your BOM. I still draw my schematics and layout my boards. I haven’t found it any good for those tasks yet. There are too many stupid errors it makes. I do get it to review my work though and often it catches things I have missed.

I'm finishing my bachelor's degree in radio electronics and instrument engineering. I've been using AI models to help me understand various concepts, but I want to say that, for now, they aren't ready for serious development.

If you give it a real solver to drive and business constraints to operate under, it will do pretty good job (which is to map your business rules to constraints and balanced costs, develop deterministic tests, probabilistic tests, acceptance gates, all boring stuff).

Is this basically what https://www.diode.computer/ is doing?

Have tried this a few times. While AI has been helpful in talking through component choices and other topics, it’s consistently been a spectacular fail each time in actually designing the board.

I’ve had similar results asking AI to design 3D models for 3D printing.

“Coach me on optimizing error on my printer”… helps.

“Build me a print ready file to these specs.”… it’s like a drunk cat attacked my computer. Just confidently puts out total nonsense.

It's going to tell us that boards are inefficient and to start different

Very limited study.

A lot of datasheets are inaccessible without signing an NDA. Even if you're a VC-backed enterprise, some unnamed chip vendors will tell you to pound sand if you're less than 8 figures of annual revenue.

Worse, many recommendations in datasheets were written in the 80s, overkill for many applications, or completely wrong and won't be updated until an errata is published 6 months later. Given current workflows, I don't see how AI would help designing a PCB with an alpha chip that's doing anything remotely novel.

More to the articles point, AI designing ASICs or other Verilog/HDL defined components could be very interesting use case

I know a startup [1] that tries to accomplish this.

[1] https://www.schematik.io/

Astra seems generally available now in codex at least - got any updates on this?

Someone will create a self replicating robot factory soon.

All robots designed by robots.

Likely a crazy youtuber first

the answer is a resounding yes: https://github.com/seanwevans/pynq_butterfly

Yes. I just made one with Fusion and Codex.

Interesting. AI may be pretty good at managing the gazillion different things that make up circuit boards.

Frankly, I am surprised that it isn't already a solved problem, as we've had silicon compilers, for many years, and I always figured that IC design is more difficult than PCB.

Works very well with EAGLE XML files, especially if you give it the EAGLE.DTD schema that CadSoft provides. Both .sch and .brd files can be extensively manipulated by Claude (and likely everybody else at this point.)

The submission reeks of LLM tells (especially the "UI" just looks straight like the usual Claude slop).

Anyway... the posed question reminds me of an anecdote I cannot find because Google is contaminated to hell and beyond, some researchers a decade ago let a machine-learning algorithm loose on an FPGA, and it "found" a design that worked but made no sense, because it exploited unique physical features of this specific chip.

[flagged]

[dead]

[dead]

[dead]

Yes — this is already possible to a useful degree. I’ve been using tscircuit, where you can describe circuits in code and use AI agents to generate and iterate on schematics and PCB layouts. I’ve seen designs from this workflow go all the way to fabricated, working hardware.